Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Microchip Technology/ATSAME51J19A/OSC32KCTRL/INTENSET#0x0
Interrupt Enable Set
XOSC32K Ready Interrupt Enable
XOSC32K Clock Failure Detector Interrupt Enable
https://github.com/cmsis-svd/cmsis-svd-data